FVO — Formal Verification Online
Lesson 4.7 · Formal Property Verification (FPV) Basics

How FPV differs from simulation in practice

QuestionSimulation answerFPV answer
What drives the inputs?Your testbenchThe tool: any value on any cycle, unless an assumption forbids it
Which values are checked?Those that occur in your testsAll values allowed by assumptions — including the "weird" ones
How big can the model be?Whole chipsTypically blocks of thousands to low hundreds of thousands of flops; more with abstraction
How do you reach a scenario?Write a directed or constrained-random testWrite a cover; the tool finds the shortest path
What does debug look like?Long logs and waveformsShort, minimal traces of a few to a few dozen cycles
When are you done?Coverage closureAll assertions proven (or justified bounded), covers hit, quality checks passed

Choosing how deep to go

You do not have to aim for full signoff on every block. Chapter 1 introduced the usage models; the following chapters show two of them in depth:

  • Design exploration (Chapter 5): fast feedback for designers, mostly covers, little rigour required.
  • Bug hunting and signoff (Chapter 6): complete property sets, quality checks and exit criteria.

Chapter takeaways

Was this page helpful?

Tip: select any text on the page before clicking Report and it will be quoted in your report.